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@ -1,6 +1,6 @@ |
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include(MAKEDEV.sub)dnl |
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dnl |
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vers(a, {-$OpenBSD: MAKEDEV.mi,v 1.37 2002/02/21 13:03:00 todd Exp $-})dnl |
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vers(a, {-$OpenBSD: MAKEDEV.mi,v 1.38 2002/02/21 13:41:55 todd Exp $-})dnl |
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dnl |
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divert(1)dnl |
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{-#-} |
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@ -148,7 +148,7 @@ twrget(all, mmcl, mmclock)dnl |
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target(all, lpt, 0, 1, 2)dnl |
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twrget(all, lpt, lpa, 0, 1, 2)dnl |
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target(all, joy, 0, 1)dnl |
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target(all, rnd, random)dnl |
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twrget(all, rnd, random)dnl |
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target(all, uk, 0)dnl |
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target(all, st, 0)dnl |
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target(all, wt, 0)dnl |
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@ -173,7 +173,6 @@ twrget(all, csx, cgsix, 0)dnl |
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twrget(all, ceg, cgeight, 0)dnl |
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twrget(all, cfo, cgfourteen, 0)dnl |
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target(all, tcx, 0)dnl |
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twrget(all, grf_mac, grf, 0, 1, 2, 3)dnl |
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twrget(all, grf_amiga, grf, 0, 1, 2, 3, 4, 5, 6)dnl |
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target(all, par, 0)dnl |
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twrget(all, amouse, mouse, 0, 1)dnl |
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@ -304,6 +303,7 @@ target(ramd, bpf, 0)dnl |
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target(ramd, rd, 0)dnl |
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-})dnl |
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ifelse(MACHINE, sparc, {-dnl |
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target(all, uk, 1)dnl |
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target(all, ses, 0)dnl |
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target(all, ch, 0)dnl |
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target(all, ss, 0, 1)dnl |
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@ -326,6 +326,7 @@ target(ramd, rd, 0)dnl |
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target(ramd, cd, 0)dnl |
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-})dnl |
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ifelse(MACHINE, sparc64, {-dnl |
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target(all, uk, 1)dnl |
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twrget(wscons, wscons, ttyD, cfg, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b)dnl |
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target(all, ccd, 0, 1, 2, 3)dnl |
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target(all, ses, 0)dnl |
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@ -549,6 +550,7 @@ target(ramd, bpf, 0, 1)dnl |
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target(ramd, tun, 0, 1)dnl |
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-})dnl |
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ifelse(MACHINE, mac68k, {-dnl |
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twrget(all, grf_mac, grf, 0, 1, 2, 3)dnl |
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target(all, uk, 1)dnl |
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target(all, ses, 0)dnl |
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target(all, sd, 0, 1, 2, 3, 4)dnl |
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@ -565,6 +567,7 @@ target(all, xy, 0, 1, 2, 3)dnl |
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target(all, rd, 0)dnl |
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target(all, cd, 0, 1)dnl |
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target(all, ccd, 0, 1, 2, 3)dnl |
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twrget(all, grf_mac, grf, 0, 1)dnl |
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twrget(ramd, mac_ttye, ttye, 0)dnl |
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target(ramd, cd, 0, 1)dnl |
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target(ramd, sd, 0, 1, 2, 3)dnl |
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@ -599,8 +602,10 @@ target(ramd, cd, 0, 1)dnl)dnl |
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target(ramd, rd, 0)dnl |
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target(ramd, tty0, 0, 1)dnl |
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target(ramd, pty, 0)dnl |
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twrget(ramd, rnd, random)dnl |
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-})dnl |
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ifelse(MACHINE, sun3, {- |
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target(all, uk, 1)dnl |
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target(all, ses, 0)dnl |
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target(all, ch, 0)dnl |
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target(all, ss, 0, 1)dnl |
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